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| VL-FS-MDLS16163-04 REV. B (MDLS16163-LED01) FEB/2004 PAGE 2 OF 12 DOCUMENT REVISION HISTORY 1: DOCUMENT REVISION FROM TO A A B DATE 2000.02.04 2004.02.10 DESCRIPTION First Release Items 1 to 4 were updated: (Based on the test specification: VL-TS-MDLS16163-04, REV. A, 2001-02-28). 1.) (Page 5, Figure 1) Outline Drawing was updated. 2.) (Page 7, Point 4.2) Environmental Condition was updated. 3.) (Page 8, Table 5) Supply voltage (LCD), Supply Current (Logic & LCD) & Supply Current (LCD) were updated. 4.) (Page 9, Point 5.2) Operating Temperature was updated. 5.) (Page 12, Point 6) Correspondence between Character Codes and Character Patterns was added. CHANGED BY PHILIP CHENG HELEN HE CHECKED BY K.P.HO YU HAO VL-FS-MDLS16163-04 REV. B (MDLS16163-LED01) FEB/2004 PAGE 3 OF 12 CONTENTS Page No. 1. 2. 3. 4. 4.1 4.2 5. 5.1 5.2 5.3 6. GENERAL DESCRIPTION MECHANICAL SPECIFICATIONS INTERFACE SIGNALS ABSOLUTE MAXIMUM RATINGS ELECTRICAL MAXIMUM RATINGS (Ta=25C) ENVIRONMENTAL CONDITION ELECTRICAL SPECIFICATIONS TYPICAL ELECTRICAL CHARACTERISTICS TIMING SPECIFICATIONS TIMING DIAGRAM OF VDD AGAINST V0 CORRESPONDENCE BETWEEN CHARACTER CODES AND CHARACTER PATTERNS (NOVATEK STANDARD NT3881D-01) 4 4 6 7 7 7 8 8 9 11 12 VL-FS-MDLS16163-04 REV. B (MDLS16163-LED01) FEB/2004 PAGE 4 OF 12 VARITRONIX LIMITED Specification of LCD Module Type Model No.: MDLS16163-04 1. General Description * * * * * 16 characters (5 x 8 dots) x 1 line STN Positive Yellow Transflective LCD Character Module. Viewing Angle: 6 O'clock direction. Driving duty: 1/16 Duty, 1/5 bias. `NOVATEK' NT3881DH-01/AI (die form) LCD Controller and Driver or equivalent. Yellow-green LED01 backlight. 2. Mechanical Specifications The mechanical detail is shown in Fig. 1 and summarized in Table 1 below. Table 1 Parameter Outline dimensions Viewing area Display format Character size Character spacing Character pitch Dot size Dot spacing Dot pitch Weight: Specifications 53.0(W) x 20.0(H) x 8.0 MAX(D) 36.0(W) x 10.0(H) 16 characters x 1 line 1.85(W) x 3.15(H) (5 x 8 dots) 0.30(W) 2.15(W) x 3.15(H) 0.33(W) x 0.35(H) 0.05(W) x 0.05(H) 0.38(W) x 0.40(H) TBD Unit mm mm mm mm mm mm mm mm grams VL-FS-MDLS16163-04 REV. B (MDLS16163-LED01) FEB/2004 PAGE 5 OF 12 Figure 1: Outline Drawing VL-FS-MDLS16163-04 REV. B (MDLS16163-LED01) FEB/2004 PAGE 6 OF 12 3. Interface signals Table 2 Pin No. 1 2 3 4 Symbol VSS VDD V0 RS Description Ground (0V). Power supply for logic (+5V) Power supply for LCD driver Register Select Input: "High" for Data register (for read and write) "Low" for Instruction register (for write), Busy flag, address counter (for read) Read/Write signal: "High" for Read mode. "Low" for Write mode. Enable. Start signal for data read /write. Data input/output (LSB) Data input/output Data input/output Data input/output Data input/output Data input/output Data input/output Data input/output (MSB) Anode of LED backlight Cathode of LED backlight 5 6 7 8 9 10 11 12 13 14 15 16 R/W E DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 LED(+) LED(-) VL-FS-MDLS16163-04 REV. B (MDLS16163-LED01) FEB/2004 PAGE 7 OF 12 4. 4.1 Absolute Maximum Ratings Electrical Maximum Ratings (Ta = 25 C) Table 3 Parameter Symbol Min. Max. Unit Power Supply voltage (Logic) VDD - VSS -0.3 +7.0 V Power Supply voltage (LCD drive) VLCD=VDD - V0 -0.3 +13.5 V Input voltage Vin -0.3 VDD +0.3 V Note: The modules may be destroyed if they are used beyond the absolute maximum ratings. All voltage values are referenced to VSS = 0V. 4.2 Environmental Condition Table 4 Storage Operating Temperature Temperature (Tstg) (Topr) Min. Max. Min. Max. -20C +70C -30C +80C 95% max. RH for Ta 40C < 95% RH for Ta > 40C Frequency: 10 55 Hz Amplitude: 0.75 mm Duration: 20 cycles in each direction. Pulse duration : 11 ms 2 Peak acceleration: 981 m/s = 100g Number of shocks : 3 shocks in 3 mutually perpendicular axes. Item Ambient Temperature Humidity Vibration (IEC 68-2-6) cells must be mounted on a suitable connector Shock (IEC 68-2-27) Half-sine pulse shape Remark Dry no condensation 3 directions 3 directions VL-FS-MDLS16163-04 REV. B (MDLS16163-LED01) FEB/2004 PAGE 8 OF 12 5. 5.1 Electrical Specifications Typical Electrical Characteristics At Ta = 25 C, VDD = 5V5%, VSS=0V. Table 5 Parameter Supply voltage (Logic) Supply voltage (LCD) Input signal voltage for E,DB0-DB7,R/W,RS. Input signal voltage 2 for OSC1 Supply Current (Logic & LCD) Supply Current (LCD) Symbol VDD-VSS VLCD =VDD-V0 VIH VIL VIH2 VIL2 IDD Conditions VDD =5.0V, Note1. "H" level "L" level "H" level "L" level Character mode, Note 1 Checker board mode, Note 1 Character mode, Note 1 Checker board mode, Note 1 Forward current =2x10=20mA Number of LED chips=2 X 2 = 4. Note 1: There is tolerance in optimum LCD driving voltage during production and it will be within the specified range. Min. 4.75 4.75 2.2 -0.3 VDD1.0 VSS 3.8 Typ. 5.00 5.00 1.41 1.61 0.57 0.57 4.1 Max. 5.25 5.25 VDD 0.8 VDD 1.0 2.11 2.41 0.86 0.86 4.5 Unit V V V V V V mA mA mA mA V I0 Supply voltage of yellow-green LED01 backlight VLED01 VL-FS-MDLS16163-04 REV. B (MDLS16163-LED01) FEB/2004 PAGE 9 OF 12 5.2 Timing Specifications At Ta = -20 C To +70 C, VDD = +5V5%, VSS = 0V. Refer to Fig. 2, the bus timing diagram for write mode. Table 6 Parameter Enable cycle time Enable "High" level pulse width Enable rise time Enable fall time RS, R/W set-up time RS, R/W address hold time Data output delay Data hold time Symbol tCYCE tWHE tRE tFE tAS tAH tDS tDHR Min. 500 300 60 100 10 100 10 Max. 25 25 Unit ns ns ns ns ns ns ns ns Remarks 8-bit operation mode 4-bit operation mode Refer to Fig. 3, the bus timing diagram for read mode . Table 7 Parameter Enable cycle time Enable "High" level pulse width Enable rise time Enable fall time RS, R/W set-up time RS, R/W address hold time Read data output delay Read data hold time Symbol tCYCE tWHE tRE tFE tAS tAH tRD tDHR Min. 500 300 60 100 10 20 Max. 25 25 190 Unit ns ns ns ns ns ns ns ns Remarks 8-bit operation mode 4-bit operation mode VL-FS-MDLS16163-04 REV. B (MDLS16163-LED01) FEB/2004 PAGE 10 OF 12 Figure 2: Bus write operation sequence (Writing data from MPU to NT3881D). Figure 3: Bus read operation sequence (Reading out data from NT3881D to MPU). VL-FS-MDLS16163-04 REV. B (MDLS16163-LED01) FEB/2004 PAGE 11 OF 12 5.3 Timing Diagram of VDD against V0. Power on sequence shall meet the requirement of Figure 4, the timing diagram of VDD against V0. VDD 95% LOGIC SUPPLY VOLTAGE 0V 50ms(typical) V0 0V LCD SUPPLY VOLTAGE Figure 4: Timing diagram of VDD against V0. VL-FS-MDLS16163-04 REV. B (MDLS16163-LED01) FEB/2004 PAGE 12 OF 12 6. Correspondence between Character Codes and Character Patterns (NOVATEK Standard NT3881D-01) "Varitronix Limited reserves the right to change this specification." FAX: (852) 2343-9555. URL: http://www.varitronix.com - END - |
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